VLSI chip design and development

please do elaborate me on the various timing paths to be verified in Static timing anlaysis

there are 4 timing paths..among 4, one is pure combinational, rest 3 are sequential paths

Timing paths
1. Path starting from Input port to the Register.
2. Path starting from register and ending at the register
3. Path starting from the register and ending at the output port
4. path starting from input port and ending at the output port (this is purely combinatinal path).

hope this answers ....