VLSI chip design and development

Hi

wht is pre CTS and Post CTS,wht is the use of CTS in STA

wht is clock jitter,clock skew,margin

Regards
Lokesh

CTS is a step where in your tool builds in the actual clock tree and routes them to the respective clock pins....
In the preCTS stage the tool takes in the constraints specified by the user(latency values,skew values) and generates the timing reports....its the ideal one
In the postCTS the tool generates the timing analysis report based on the clock tree which has been built up during CTS... its the actual computed mode.......

Clock jitter is the amount of cycle-to-cycle variation that can occur in a clock s period.
Clock skew is the difference in the latest ans earliest arrival time of the clock.
Margin is the