Welcome
Welcome to <strong>VLSI chip design and development</strong>.

You are currently viewing our boards as a guest, which gives you limited access to view most discussions and access our other features. By joining our free community, you will have access to post topics, communicate privately with other members (PM), respond to polls, upload content, and access many other special features. Registration is fast, simple, and absolutely free, so please, <a href="/profile.php?mode=register">join our community today</a>!

Regarding i/p files check

A platform to discuss about automatic place and route, tools, flows, methodologies involved in achieving timing closure...

Regarding i/p files check

Postby designer_ec on Fri Jul 17, 2009 10:57 am

Hi,

Before starting Physical design (place & route) what are checks we need to do for i/p files. I mean



How to verify given logical libs and physical libs are currect or not.
How to verify that given netlist have any problems or not.
How to very given sdc file currect or we need to any modifications.
How to verify other file (tech file,cap rule file,resistance rule file etc).

please I need detailed information about this urgently.
designer_ec
 
Posts: 3
Joined: Thu Jul 16, 2009 8:04 pm

Return to Place & Route

Who is online

Users browsing this forum: No registered users and 0 guests

cron