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Very urgent Opening for I/O Circuit Designers

A platform to discuss about the various Architectural challenges.. Burning Technical issues and relevant architectural solutions, Design best practices, Technical Know hows, RTL challenges, Metastability issues , RTL for achieving best area/power/timing/dft issues...

Very urgent Opening for I/O Circuit Designers

Postby pbsmba on Wed Aug 05, 2009 5:12 pm

REFERENCES REQUIRED.
Hi!!!
We are having very good opening for Circuit Designers for a CMML5 Company ……..
Role: Member Technical Staff
Job Description
1. I/O Circuit Design:
GPIO design:
• Main driver, level shifters, SSN simulation, characterization
• ESD knowledge
• Layout knowledge/experience
Complex IO design:
• DDR IOs, XTAL IOs, LVDS etc
• ESD, analog issues
• Layout knowledge
2. I/O Layout Design:
• Good knowledge of tools
• EM issues, ESD layouts
• Centroid layout issues
• Prototype creation experience
• Powerline structures
Required Soft Skills
• Excellent oral and written communication skills
• Good problem solving and logical reasoning skills
• Strong interpersonal / customer relation skills
• Ability to manage multiple tasks and deadlines
• Exposure to quality processes
• Excellent Team player
Thanks & Regards,
Balu
Team Lead| E-Mail: balu@volensoftware.com| Phone: 080-40574444 Ext: 446|Mobile: 09901554481|Volen software Services Pvt Ltd |#8, 3rd Floor, MSB 3rd Block, KSCMF Building, Cunningham Road| Shivaji Nagar, Bangalore-560052|
pbsmba
 
Posts: 1
Joined: Wed Aug 05, 2009 5:09 pm

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