Welcome
Welcome to <strong>VLSI chip design and development</strong>.

You are currently viewing our boards as a guest, which gives you limited access to view most discussions and access our other features. By joining our free community, you will have access to post topics, communicate privately with other members (PM), respond to polls, upload content, and access many other special features. Registration is fast, simple, and absolutely free, so please, <a href="/profile.php?mode=register">join our community today</a>!

what is called as transactors

A forum to discuss about Verification methodology, coverage Analysis/metrics, bus functional models, Testbench related issues

what is called as transactors

Postby laxminarayana1 on Fri Jul 27, 2007 12:07 pm

hi,

in the verification methodology, i came across with transactors terminology, can you briefly help in understanding the concepts behind this

thanks,
laxmi
laxminarayana1
 
Posts: 3
Joined: Fri Jul 27, 2007 12:02 pm

Postby gopi on Mon Jun 16, 2008 7:59 am

A model of a system or component at an abstraction level higher than RTL in which the interface is defined in terms of transactions, rather than signals is called traction level modeling. By abstracting out the details transaction level models run faster and can be written more easily. Transaction-level modeling is a high-level approach to modeling digital systems where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture.


Gopi
http://www.testbench.in
..
..
gopi
 
Posts: 1
Joined: Mon Jun 16, 2008 7:56 am


Return to Verification Methodology

Who is online

Users browsing this forum: No registered users and 0 guests

cron